深圳市中立信电子科技有限公司

S912XHZ384F1VAG

16位微控制器 - MCU 16-bit MCU S12X core 384KB Flash 80MHz

 Features  S912XHZ384F1VAG

• HCS12X Core

— 16-bit HCS12X CPU

– Upward compatible with MC9S12 instruction set

– Interrupt stacking and programmer’s model identical to MC9S12

– Instruction queue

– Enhanced indexed addressing

– Enhanced instruction set

— EBI (external bus interface)

— MMC (module mapping control)

— INT (interrupt controller)

— DBG (debug module to monitor HCS12X CPU and XGATE bus activity)

— BDM (background debug mode)

• XGATE (peripheral coprocessor)

— Parallel processing module off loads the CPU by providing high-speed data processing and

transfer

— Data transfer between Flash EEPROM, RAM, peripheral modules, and I/O ports

• Memory

– 512K, 384K, 256K byte Flash EEPROM

– 4K byte EEPROM

– 32K, 28K, 16K byte RAM

• CRG (clock and reset generator)

— Low noise/low power Pierce oscillator

— PLL

— COP watchdog

— Real time interrupt

— Clock monitor

— Fast wake-up from stop mode

• Analog-to-digital converter  S912XHZ384F1VAG

— 16 channels, 10-bit resolution

— External conversion trigger capability

• ECT (enhanced capture timer)

— 16-bit main counter with 8-bit prescaler

— 8 programmable input capture or output compare channels

— Four 8-bit or two 16-bit pulse accumulators

• PIT (periodic interrupt timer)  S912XHZ384F1VAG

— Four timers with independent time-out periods

— Time-out periods selectable between 1 and 224 bus clock cycles