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LCMXO256C-3TN100I FPGA
: 13 mA
: 78 I/O
: 256
: 1.8 V, 2.5 V, 3.3 V
: - 40 ℃
: + 100 ℃
相关产品
产品信息
LCMXO256C-3TN100I
FPGA - 现场可编程门阵列 256 LUTs 78 I/O 1.8/2.5/3.3V IND
Introduction LCMXO256C-3TN100I
The MachXO is optimized to meet the requirements of
applications traditionally addressed by CPLDs and low
capacity FPGAs: glue logic, bus bridging, bus interfacing,
power-up control, and control logic. These devices
bring together the best features of CPLD and FPGA
devices on a single chip.
Features LCMXO256C-3TN100I
Non-volatile, Infinitely Reconfigurable
• Instant-on – powers up in microseconds
• Single chip, no external configuration memory
required
• Excellent design security, no bit stream to
intercept
• Reconfigure SRAM based logic in milliseconds
• SRAM and non-volatile memory programmable
through JTAG port
• Supports background programming of
non-volatile memory
Sleep Mode LCMXO256C-3TN100I
• Allows up to 100x static current reduction
TransFR™ Reconfiguration (TFR)
• In-field logic update while system operates
High I/O to Logic Density
• 256 to 2280 LUT4s
• 73 to 271 I/Os with extensive package options
• Density migration supported
• Lead free/RoHS compliant packaging
